We build tools that give India's analog IC engineers — in government labs, universities, and hardware startups — the automation they need to design faster, without depending on foreign black-box tooling.
India's analog semiconductor engineers should not be dependent on foreign black-box tools for foundational design work. We build EDA software that is auditable, precise, and built for the specific PDKs, programmes, and institutions that make up India's semiconductor ecosystem.
Every tool we ship has a number behind every claim. No adjectives without data.
Every claim is traceable to a tool output, a foundry spec, or a simulation result.
Every design decision is reviewable by the engineer who signs off — against the schematic and the corner it was run against.
Designed for the PDKs, programmes, and institutions — C2S, C-DAC, SCL — that make up India's semiconductor mission.
A GUI-based tool that automates transistor-level design of CMOS Operational Transconductance Amplifiers using the gm/ID methodology. Analog sizing that used to take weeks — ready in minutes.
AmpForge is built for anyone doing serious analog IC design work in India — across government, academia, and industry.
C-DAC, IITs, NITs, NIELIT, and research institutions working under C2S, ChipIN, and MeitY programmes. AmpForge deploys on a shared lab server — one installation, multiple concurrent users, fully offline.
Engineering teams who need to shorten the OTA sizing loop. Manual hand-calculation and iterative SPICE runs take weeks. AmpForge compresses that to minutes, with three verified starting points.
Fabless startups can use AmpForge to save significant engineering resources — fewer hours spent on manual sizing means more bandwidth for the actual product. Works on SCL 180nm and open-source PDKs out of the box.
Multiple lab sessions in analog design courses can be structured around AmpForge — topology selection, performance trade-offs, Manual Mode fine-tuning. Students work with real SPICE outputs, not textbook approximations.
Trial and full licences available. 48-hour turnaround on your .lic file.